Schematic & PCB Design
Multi-layer boards up to 6 layers with impedance-controlled routing, designed against UL and FCC EMC/EMI and thermal requirements from the first schematic rather than after the first failed scan.
I work with hardware teams and product companies that need a connected electronic product taken from concept to something a contract manufacturer can actually build — and with telecom operators that need the optical layer designed or debugged.
Multi-layer boards up to 6 layers with impedance-controlled routing, designed against UL and FCC EMC/EMI and thermal requirements from the first schematic rather than after the first failed scan.
C/C++ on ESP32, ARM and PIC — ESP-IDF, FreeRTOS, bare metal. Board bring-up, drivers, OTA update paths over LTE or CANBus, and production test firmware.
CWDM/DWDM link budgets, transceiver selection and integration, fibre sensing, and optical performance characterization with OSA, OTDR and power-meter measurements.
Finding why a board fails a scan and fixing it in layout rather than in a shield can. Pre-scan, root cause, and a mitigation plan you can hand to your CM.
Send a short description of the product and where it is stuck. I will reply with whether I am the right person for it, a rough shape for the work, and a quote — or a pointer to someone better suited.